Transparent power-stage estimates for learning and early design review.
PowerFET Lab is a browser-based engineering calculator for recognized converter topologies. Its purpose is to make the assumptions, equations, device stresses, and estimated losses easier to inspect.
What the calculator covers
The calculator includes manual PWM and fully-on MOSFET models, synchronous buck, boost, synchronous boost, half bridge, full bridge, full-bridge LLC, dual full-bridge CLLC, and totem-pole PFC stages.
Calculations include conduction and switching loss, gate-drive energy, body-diode intervals, temperature-adjusted on-resistance, ripple estimates, passive loss estimates, waveform views, design sweeps, Monte Carlo analysis, and engineering checks.
Public information only
The topology descriptions and defaults are generic engineering examples. The application does not include proprietary schematics, employer data, customer records, confidential component selections, internal test results, or uploaded files.
Why the math stays visible
A calculated number is useful only when its assumptions can be reviewed. The calculator therefore presents formulas, substituted values, and intermediate results alongside the final answer.